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gdkchan
0c87bf9ea4
Refactor CPU interface to allow the implementation of other CPU emulators ( #3362 ) ...
* Refactor CPU interface
* Use IExecutionContext interface on SVC handler, change how CPU interrupts invokes the handlers
* Make CpuEngine take a ITickSource rather than returning one
The previous implementation had the scenario where the CPU engine had to implement the tick source in mind, like for example, when we have a hypervisor and the game can read CNTPCT on the host directly. However given that we need to do conversion due to different frequencies anyway, it's not worth it. It's better to just let the user pass the tick source and redirect any reads to CNTPCT to the user tick source
* XML docs for the public interfaces
* PPTC invalidation due to NativeInterface function name changes
* Fix build of the CPU tests
* PR feedback
2022-05-31 16:29:35 -03:00
..
CryptoHelper.cs
Use ReadOnlySpan<byte> compiler optimization for static data ( #3130 )
2022-02-17 21:38:50 +01:00
InstEmitAlu.cs
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InstEmitAlu32.cs
T32: Implement ALU (shifted register) instructions ( #3135 )
2022-02-22 19:11:28 -03:00
InstEmitAluHelper.cs
A32: Fix ALU immediate instructions ( #3179 )
2022-03-05 15:23:10 -03:00
InstEmitBfm.cs
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InstEmitCcmp.cs
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InstEmitCsel.cs
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InstEmitDiv.cs
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InstEmitException.cs
Decoder: Exit on trapping instructions, and resume execution at trapping instruction ( #3153 )
2022-03-04 23:16:58 +01:00
InstEmitException32.cs
Decoder: Exit on trapping instructions, and resume execution at trapping instruction ( #3153 )
2022-03-04 23:16:58 +01:00
InstEmitFlow.cs
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InstEmitFlow32.cs
T32: Implement B, B.cond, BL, BLX ( #3155 )
2022-03-04 23:05:08 +01:00
InstEmitFlowHelper.cs
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InstEmitHash.cs
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InstEmitHash32.cs
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InstEmitHashHelper.cs
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InstEmitHelper.cs
T32: Implement B, B.cond, BL, BLX ( #3155 )
2022-03-04 23:05:08 +01:00
InstEmitMemory.cs
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InstEmitMemory32.cs
ARMeilleure: Thumb support (All T16 instructions) ( #3105 )
2022-02-17 19:39:45 -03:00
InstEmitMemoryEx.cs
InstEmitMemoryEx: Barrier after write on ordered store ( #3193 )
2022-03-19 10:32:35 -03:00
InstEmitMemoryEx32.cs
InstEmitMemoryEx: Barrier after write on ordered store ( #3193 )
2022-03-19 10:32:35 -03:00
InstEmitMemoryExHelper.cs
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InstEmitMemoryHelper.cs
ARMeilleure: Thumb support (All T16 instructions) ( #3105 )
2022-02-17 19:39:45 -03:00
InstEmitMove.cs
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InstEmitMul.cs
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InstEmitMul32.cs
ARMeilleure: Thumb support (All T16 instructions) ( #3105 )
2022-02-17 19:39:45 -03:00
InstEmitSimdArithmetic.cs
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InstEmitSimdArithmetic32.cs
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InstEmitSimdCmp.cs
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InstEmitSimdCmp32.cs
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InstEmitSimdCrypto.cs
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InstEmitSimdCrypto32.cs
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InstEmitSimdCvt.cs
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InstEmitSimdCvt32.cs
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InstEmitSimdHash.cs
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InstEmitSimdHelper.cs
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InstEmitSimdHelper32.cs
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InstEmitSimdLogical.cs
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InstEmitSimdLogical32.cs
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InstEmitSimdMemory.cs
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InstEmitSimdMemory32.cs
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InstEmitSimdMove.cs
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InstEmitSimdMove32.cs
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InstEmitSimdShift.cs
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InstEmitSimdShift32.cs
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InstEmitSystem.cs
Refactor CPU interface to allow the implementation of other CPU emulators ( #3362 )
2022-05-31 16:29:35 -03:00
InstEmitSystem32.cs
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InstName.cs
ARMeilleure: Thumb support (All T16 instructions) ( #3105 )
2022-02-17 19:39:45 -03:00
NativeInterface.cs
Refactor CPU interface to allow the implementation of other CPU emulators ( #3362 )
2022-05-31 16:29:35 -03:00
SoftFallback.cs
Use ReadOnlySpan<byte> compiler optimization for static data ( #3130 )
2022-02-17 21:38:50 +01:00
SoftFloat.cs
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0c87bf9ea4