2 Commits (ec4cd57ccfada247d720b41c1913299abc733c74)

Author	SHA1	Message	Date
merry	1529e6cf0d	T32: Add Vfp instructions (#3690)	2022-09-10 23:03:14 -03:00
merry	7b35ebc64a	T32: Implement ALU (shifted register) instructions (#3135) ... * T32: Implement ADC, ADD, AND, BIC, CMN, CMP, EOR, MOV, MVN, ORN, ORR, RSB, SBC, SUB, TEQ, TST (shifted register) * OpCodeTable: Sort T32 list * Tests: Rename RandomTestCase to PrecomputedThumbTestCase * T32: Tests for AluRsImm instructions * fix nit * fix nit 2	2022-02-22 19:11:28 -03:00