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2 Commits (d540af5dc0d45fc5057a99190fe3e896f6a01c19)

Author SHA1 Message Date
merry f5235fff29
ARMeilleure: Hardware accelerate SHA256 (#3585) 
* ARMeilleure/HardwareCapabilities: Add Sha

* ARMeilleure/Intrinsic: Add X86Sha256Rnds2

* ARmeilleure: Hardware accelerate SHA256H/SHA256H2

* ARMeilleure/Intrinsic: Add X86Sha256Msg1, X86Sha256Msg2

* ARMeilleure/Intrinsic: Add X86Palignr

* ARMeilleure: Hardware accelerate SHA256SU0, SHA256SU1

* PTC: Bump InternalVersion
 2022-08-25 10:12:13 +00:00
gdkchan 2bb9b33da1
Implement Arm32 Sha256 and MRS Rd, CPSR instructions (#3544) 
* Implement Arm32 Sha256 and MRS Rd, CPSR instructions

* Add tests using Arm64 outputs
 2022-08-05 19:03:50 +02:00