1 Commits (624e813cd3e5d782847c577c2da0cfb8a121fd18)

Author	SHA1	Message	Date
LDj3SNuD	8f6387128a	Add Sse Opt. for Cmeq_V_2D, Cmgt_V_2D (Reg). Add Sse Opt. for Crc32cb, Crc32ch, Crc32cw, Crc32cx. Add 10 simple tests for Fcmgt, Fcmge, Fcmeq, Fcmle, Fcmlt (S, V) (Reg, Zero). Add 2 Cnt_V tests. (#183) ... * Add files via upload * Add files via upload * Add files via upload * CPE * Add EmitSse42Crc32() * Update CpuTestSimdCmp.cs * Update Pseudocode.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update Instructions.cs	2018-06-25 22:32:29 -03:00